Boost Sequential Program Performance Using A Virtual Large Instruction Window on Chip Multicore Processor

Chip Multicore processor provides the opportunity to boost sequential program performance with the available duplicated hardware resources in the cores. Previous results have shown that most of sequential programs can benefit from a large and fast instruction window. In this paper, we propose a simple method to faster sequential program execution on a chip multicore processor through organizing dynamically the unused available instruction window entries in the other cores into a relative virtual large instruction window for the running program. The hardware budget of our method is small. And the initial analysis tells us that it is a promising way to improve sequential program performance in a chip multicore processor.